Optical lithography may be used to pattern features on a substrate by illuminating a light-sensitive layer of the substrate at a wavelength comparable to a desired feature size. Such a technique is commonly used in the semiconductor industry, for example, to pattern integrated circuits on semiconductor wafers. State-of-the-art semiconductor lithography utilizes light of ultraviolet (UV) or deep ultraviolet (DUV) wavelengths, typically in the range of 150-500 nm, to pattern successive layers of material, in order to form electronic structures having feature sizes in the submicron-to-nanometer range.
The process of transferring a pattern to a wafer substrate is analogous to a conventional photographic printing process. In the case of photo printing, a light beam passes through a film “negative” and through one or more enlarging lenses, to form an image on photosensitive paper, which is then chemically developed to produce a print of the image; in the case of optical lithography, a light beam passes through a quartz photomask, or “reticle” bearing a metallic circuit pattern, and through one or more reducing lenses, to form an image in a photosensitive material on a target substrate. The substrate may then be etched or otherwise chemically processed to transfer the image to an underlying layer of material. Each flaw in a reticle thus has the potential to affect mass production of a large number of electronic circuit chips.
Because the metal-patterned quartz reticle is exposed for long periods of time to small-wavelength, high-energy light in close proximity to a light source, the reticle tends to absorb heat, causing thermal expansion. If the thermal expansion occurs in a non-uniform manner, pattern dimensions on the reticle can become distorted. Non-uniform thermal expansion can occur, for example, if the density of the metal pattern is non-uniform across the reticle. Pattern density variations may be managed by establishing and enforcing circuit design rules during production of the reticle. However, as integrated circuit feature sizes shrink, there is less tolerance for change in reticle dimensions. In addition, use of a double-patterning technique (in which the same material layer is patterned a second time with new features aligned in-between existing features) is becoming more widespread, which results in tighter manufacturing requirements for overlay budgets. Measurement and control of reticle distortion thus can provide a competitive edge by enabling pattern-overlay capabilities that have greater accuracy and precision.